CrossLink-NX: Architecture – Programmable Input/Ouput (PIO), Programmable I/O Cell PIC, LPDDR/DDR Memory Interfaces

Module Description

In this module, we cover the various components inside the Programmable Input/Ouput (PIO) block, including the Programmable I/O Cell PIC, and usage as LPDDR/DDR memory interfaces. The blocks covered here apply to the Lattice CrossLink-NX, Certus-NX and CertusPro-NX devices.